Nifrad Hameed P
Design Verification Engineer @Cirrus Logic
Chandler, AZ, US
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2024 — Present
Design Verification Engineer @Cirrus Logic
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US
EDUCATION
2004 — 2008
Mahatma Gandhi University, Kerala
B-tech, Electronics and communication
SKILLS
CVlsiMicrocontrollersVhdlVerilogModelsimOvm ,Uvm MethdologyDebuggingSystem Verilog ,Ovm MethdologyTestingSocAsicRtl Design
ABOUT NIFRAD HAMEED P
Hands on experience in IP/Sub System/SOC Verification right from verification plan to coverage closure- Worked on PCIe TL, Amba AXI,AHB,APB, ATB, Debug -SS-Expert in developing Verification plan, test bench components using constrained random and coverage driven approach using System Verilog & UVM.
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