Nifrad Hameed P
Design Verification Engineer at Cirrus Logic
- Role
- Design Verification Engineer at Cirrus Logic
- Location
- Chandler, AZ, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Nifrad Hameed P
Hands on experience in IP/Sub System/SOC Verification right from verification plan to coverage closure- Worked on PCIe TL, Amba AXI,AHB,APB, ATB, Debug -SS-Expert in developing Verification plan, test bench components using constrained random and coverage driven approach using System Verilog & UVM.
Experience
Design Verification Engineer
Aug 2024 — Present · US
Education
Mahatma Gandhi University, Kerala
B-tech, Electronics and communication
2004 — 2008
Skills
- C
- Vlsi
- Microcontrollers
- Vhdl
- Verilog
- Modelsim
- Ovm ,Uvm Methdology
- Debugging
- System Verilog ,Ovm Methdology
- Testing
- Soc
- Asic
- Rtl Design
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