Satinder Paul Singh

Technical Advisory Board Member (Soc-mx) @Semiconductor Research Corporation Src

Munich, DE
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Sep 2024 — Present

Technical Advisory Board Member (Soc-mx) @Semiconductor Research Corporation Src

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EDUCATION

2018

MIT Sloan School of Management

Microeconomics

N/A

Stanford University

Stanford Innovation & Entrepreneurship Certificate

N/A

Indian Institute of Management Bangalore

PGPX, General Management

N/A

Nagpur University

Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

SKILLS

ManagementMicroprocessorsProcessorsMicrocontrollersPhysical DesignSales & MarketingEdaProduct EngineeringWlanCustomer InteractionMatlabArmFormal VerificationCross-Functional Team LeadershipVlsiSpyglassSemiconductor StrategyAsic/Soc ImplementationUsbWirelessRtl-GdsiiTiming ClosureMixed SignalSdlcEda Cad MethodologyData AnalysisVerificationSix SigmaStatic Timing AnalysisArm ProcessorsIcDfm, Dsm Design IssuesDftSemiconductor IpUpfVerilogFunctional VerificationSystemcLogic SynthesisSystemverilog

ABOUT SATINDER PAUL SINGH

I am Satinder Paul Singh (“Silicon Singh”), a semiconductor futurist and CTO with 20+ years of hands-on leadership across SoC architecture, chiplet design, AI accelerators, automotive ASIL-D systems, silicon lifecycle management, and advanced node (3nm–N2) technologies.My work spans the full silicon lifecycle—from concept, architecture, RTL, physical design, safety, DFT/LBIST, validation, production ramp, all the way to field reliability and AI-driven silicon lifecycle intelligence. I have built and led global engineering teams delivering high-performance, safety-critical SoCs for automotive, datacenter AI, edge compute, and next-generation consumer devices.I specialise in:SoC + Chiplet Architecture (AI, Automotive, HPC)Advanced Nodes & Foundry Strategy (TSMC 3nm–N2, Samsung 3nm, Intel 18A)AI-Driven Silicon Lifecycle Management (SLM)Functional Safety (ASIL-D), LBIST, DFT, Safety Manuals, FMEDAHigh-speed Interfaces (PCIe, LPDDR, HBM, SerDes)Packaging (2.5D/3D, CoWoS, HBM integration)Software-Defined Chips & Agentic AI for Silicon DevelopmentAcross my career, I’ve served as a technical architect, executive leader, advisor, and angel investor, helping companies scale semiconductor programs from early concept to production-grade platforms. I routinely collaborate with OEMs, Tier-1s, hyperscalers, foundries, EDA vendors, and startup ecosystems.What drives me is simple: build silicon that moves industries forward—faster, safer, smarter, and more efficient.I regularly publish deep-tech papers, speak at TEDx and global conferences, and help investors evaluate next-gen semiconductor opportunities across AI compute, chiplets, SLM analytics, automotive safety, and advanced manufacturing ecosystems.If you’re building the future of silicon, let’s connect.

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Satinder Paul Singh — Technical Advisory Board Member (Soc-mx) at Semiconductor Research Corporation Src in Munich, DE | Unifers