Ricardo U Chavez Cuadras
Senior Engineering Manager @Intel
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WORK HISTORY
Senior Engineering Manager @Intel
Guadalajara, MX
Lead and Manage an Electrical Validation Engineering Team, to deliver high quality Intel Products, which focus on high performing server and Base Stations solutions, that suit a wide range of I/O interfaces, and particularly focused on the Ethernet solutions across a wide range of Protocols that support NRZ and PAM4 signaling. The main aim is to assure the highest quality across all protocols, meeting industry and Intel quality standards, across state of the art technologies and architectures.
EDUCATION
CINVESTAV Guadalajara
Master of Science in Electric Engineering, Electronic Design
Instituto Tecnologico de Culiacan
Bachelor
ABOUT RICARDO U CHAVEZ CUADRAS
Experienced Silicon Validation Engineering Manager with a demonstrated history of working with State-of-The-Art technologies and architectures for High-Speed I/O interfaces for CPUs, chipsets and SoCs. Highly skilled in developing Test Validation Strategies for complex products targeted for Telecommunications, Networking and AI. Proven leader - driving technical forums with stakeholders from different areas (Design, platform, manufacturing, validation, etc) from different countries (US, CAN, MX, PNG, POL, IS, CR, BGA, DEU). Strong background in test processes and methodologies across several interfaces and networking protocols, with high knowledge on utilization of high-performance equipment for Transmitter and Receiver testing, such as: Network Analyzer, BERTs, Scopes, Protocol Analyzers, etc. Experienced as People Manager w/strong technical background, managing and leading high performing teams from 9-23 group of people. Strong engineering professional with a Master of Science in Electric Engineering focused in Electronic Design from CINVESTAV Guadalajara.
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