Rajasekar Rajendran
Mixed Signal Modeling & Verification Engineer @Cirrus Logic
Edinburgh, GB
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Dec 2021 — Present
Mixed Signal Modeling & Verification Engineer @Cirrus Logic
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Edinburgh, GB
EDUCATION
2001 — 2005
Anna University Chennai
Bachelor of Engineering - BE,, Electronics and Communications Engineering
2008 — 2013
Anna University Chennai
M.S. (By Research)
SKILLS
RfAdcsDacsCharacterizationMixed SignalRf CircuitsVlsiAnalog Circuit DesignSimulationsAnalog
ABOUT RAJASEKAR RAJENDRAN
Analog Mixed-Signal Verification Engineer
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