Noah Zhu

Socet Nasa Fpga Dsp Team Undergraduate Researcher @Vip At Purdue

Princeton Junction, NJ, US
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WORK HISTORY

Aug 2025 — Present

Socet Nasa Fpga Dsp Team Undergraduate Researcher @Vip At Purdue

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West Lafayette, IN, US

As a member of the NASA DSP Design Prototyping team, I am contributing to the development of critical technology for NASA\'s Habitable Worlds Observatory while collaborating with a professor at Arizona State University. Our team\'s objective is to optimize and accelerate a high-speed digital signal processing system, initially designed in MATLAB/Simulink, for implementation on an FPGA platform- Architecturally enhancing RTL code (VHDL/Verilog) to implement parallelism and increase the design\'s operational frequency- Prototyping and rigorously verifying the accelerated design on a Synopsys HAPS-100 FPGA system to validate performance improvements- Utilizing an industry-standard toolchain for the entire workflow, including RTL simulation with Siemens QuestaSim and FPGA implementation with Xilinx Vivado and Synopsys ProtoCompiler.

EDUCATION

N/A

Purdue University

Bachelor of Engineering - BE, Electrical and Electronics Engineering

N/A

Purdue University

Bachelor of Engineering - BE, FYE

ABOUT NOAH ZHU

NASA FPGA/DSP Researcher (VIP SOCET) | SSA@Purdue Industrial Relations Co-Chair | Purdue ECE Class of 2028

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Noah Zhu — Socet Nasa Fpga Dsp Team Undergraduate Researcher at Vip At Purdue in Princeton Junction, NJ, US | Unifers