Igor Arsovski

About Igor Arsovski

Hardware Architect and first-principles engineer with a track record of driving innovation across the best known AI, HPC, and networking ASICs, from initial architecture and technology co-optimization to debug and deployment. Leading HW-debug efforts on high-reliability ASICs, including SDC mitigation in AI data centers and reliability fails on HPC supercomputers used in top US banks.IBM Master Inventor with over 100 patents and more than 40 papers and presentations at premier conferences.Prior to Groq, Igor held key technical leadership roles at Google, Marvell, GlobalFoundries, and IBM, consistently delivering high-impact engineering solutions across the semiconductor industry

Experience

1. VP Lpu Hardware

   英伟达

   Dec 2025 — Present · US

Education

• University of Toronto

  Bachelor of Applied Science (B.A.Sc.), Computer Engineering

  1997 — 2001

• University of Toronto

  Master's, Electrical and Computer Engineering

  2001 — 2003

Skills

• Analog Circuit Design
• Soc
• Dram
• Rtl Design
• Integrated Circuit Design
• Microprocessors
• Processors
• Tcl
• High Performance Computing
• Cmos
• Vlsi
• Websphere Process Server
• Application-Specific Integrated Circuits (Asic)
• Hardware Architecture
• Physical Design
• Asic
• Sram
• Circuit Design
• Semiconductors
• Low-Power Design
• Static Timing Analysis
• Logic Design
• Functional Verification
• Signal Integrity
• Timing Closure
• Debugging
• Statistical Modeling
• Tcam
• Verilog
• Eda
• Asic Memory Strategy
• Computer Architecture