Uday Singh Shekhawat

WORK HISTORY

EDUCATION

ABOUT UDAY SINGH SHEKHAWAT

Technical Proficiency • Strong knowledge of analog circuit design and digital memory blocks. • Solid understanding of advanced semiconductor fabrication processes, including FinFET, GAAFET, and HEMT transistors, image sensor technologies, and semiconductor packaging technologies. • Proficient in Digital Electronics and CMOS design fundamentals. • Hands-on experience with Cadence Virtuoso for analog and mixed-signal circuit design. • Currently working as a Senior Patent Analyst, with expertise in: • Patent infringement analysis • Patentability, novelty, and prior art searchesacross advanced technologies such as processors, memory controllers, image sensors, and cutting-edge fabrication processes (FinFET, GAAFET). • Experienced in preparing detailed claim charts to map patent claims against accused products, including technologies such as package-on-package (PoP) structures and advanced semiconductor packaging designs. • Strong technical ability to assess overlaps between novel technical features and existing intellectual property, particularly in microelectronics and sensor technologies, within complex legal and technical disputes.Projects1. Low-Power Phase Frequency Detector (45 nm Technology)Designed a low-power Phase Frequency Detector (PFD) using Cadence Virtuoso in 45 nm technology. The project focused on optimizing the conventional PFD architecture by reducing transistor count, resulting in lower power consumption.2. Low-Power, High-Frequency Digital Phase-Locked Loop (45 nm Technology)Designed a digital Phase-Locked Loop (PLL) using Cadence Virtuoso and GPDK 45 nm CMOS technology in the Analog Design Environment. The objective was to reduce power consumption while enhancing PLL performance, specifically by improving lock range and lock time.3. 8×8 SRAM Array Using 6T SRAM Cells (90 nm Technology)Designed an 8×8 Static Random-Access Memory (SRAM) array using 6T SRAM cells in Cadence Virtuoso (90 nm technology). The design supports successful read and write operations for the memory array.4. SPI Protocol Implementation Using VerilogImplemented the Serial Peripheral Interface (SPI) protocol using Verilog in the Xilinx Vivado Design Suite, enabling efficient serial data communication between two devices.5. Modular Multifunctional UAV for Wildlife SurveyDeveloped a modular, multifunctional UAV for wildlife surveys using Arduino Uno as the flight controller. The project employed image processing and deep learning models to identify and count animal species in real time, improving accuracy in wildlife monitoring applications.