Srihasam Mahesh Kaushik
Asic Design Engineer @Western Semiconductor
Tempe, AZ, US
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WORK HISTORY
Jul 2025 — Present
Asic Design Engineer @Western Semiconductor
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Tempe, AZ, US
Developing a UVM-based verification environment for a PMU supporting four modes (Standby, Shutdown, Mission, Startup)• Designed modular testcases with reusable agents, layered sequences, and configurable stimulus• Developed mode-specific constraints to validate functional correctness across different PMU power modes• Achieved >95% code coverage, toggle coverage, condition coverage, and FSM coverage using directed test.
ABOUT SRIHASAM MAHESH KAUSHIK
I am an ASIC Design Engineer with a Master’s degree in Electrical Engineering…
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