Sowmya Venkateswaran
Sr Design Engineering Manager @Cadence
Bengaluru, KA, IN
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MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Jul 2025 — Present
Sr Design Engineering Manager @Cadence
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Bangalore Urban, IN
UCIe, PCIe designs for scan. COE lead
EDUCATION
2008 — 2010
University of Southern California
MS, Electrical Engineering
2004 — 2008
Anna University Chennai
BE, Electronics and Communication Engineering
SKILLS
FpgaAsicComputer ArchitectureDftApplication-Specific Integrated Circuits (Asic)DrcNcsimIntegrated Circuit DesignDigital DesignRtl DesignPrimetimeLvsCadenceCadence VirtuosoVlsiVery-Large-Scale Integration (Vlsi)TclVerilogVhdlC
ABOUT SOWMYA VENKATESWARAN
Manager - DFT Specialties: SpecialitiesLanguages: C, Verilog, TCL, VHDL(Beginner)Cadence Virtuoso (Schematic, Layout, DRC, LVS),Encounter, Conformal, Spectre,Synopsys Design Compiler, Prime Time, Protocols:AHB,USB 2.0
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