Didem Turker Melek
Sr Design Engineering Group Director @Cadence
San Francisco, CA, US
EMAILS
m••••@cadence.com
MOBILE NUMBERS
+19•••••••13
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WORK HISTORY
Dec 2025 — Present
Sr Design Engineering Group Director @Cadence
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EDUCATION
1999 — 2003
Sabanci University
B.S, Microelectronics Engineering
2003 — 2010
Texas A&M University
PhD, Electrical Engineering
ABOUT DIDEM TURKER MELEK
High speed, high performance wireline circuits and systems. Ultra low power and high bandwidth chiplets. Analog and mixed signal integrated circuits, Phase locked loop (PLL), clock generation and wireline transceiver circuits.
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