Sai Rama Krishna Nalla
Asic Hardware Engineer @Cisco
San Jose, CA, US
EMAILS
n•••@cisco.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2019 — Present
Asic Hardware Engineer @Cisco
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Datacenter Asic Team: Working on top level, which includes, 1. Power estimation and optimization : a. Responsible for early rtl power estimation and optimization using synopsis prime power rtl b. Responsible for power estimation at final stage of chip using synopsis prime 2. Formal Verification on top level, which includes connectivity check and top level feature check. Worked on logic equivalence check of top level netlist.
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