Sai Charan Koyyana
Asic Physical Design Trainee @Vlsiguru Training Institute
Srikakulam, AP, IN
EMAILS
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Jul 2024 — Present
Asic Physical Design Trainee @Vlsiguru Training Institute
View department →
Bengaluru South, IN
EDUCATION
N/A
Anil Neerukonda Institute Of Technology & Sciences
Btech, Electrical, Electronics and Communications Engineering
ABOUT SAI CHARAN KOYYANA
VLSI Physical Design Engineer | ASIC & SoC Design | Timing Closure | STA | DFT | EDA Tools Passionate about VLSI Physical Design, I specialize in translating RTL into optimized, manufacturable silicon. With expertise in Floorplanning, Power Planning, Placement, CTS, Routing, STA, and I ensure efficient and high-performance chip designs.
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.