Sagar Vetal
Principal Design Engineer @Cadence
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WORK HISTORY
Principal Design Engineer @Cadence
Pune, IN
EDUCATION
Government Polytechnic Nashik
Diploma in Electronics and telecommunication, Electrical and Electronics Engineering
C-DAC ACTS pune
Post Graduation Diploma, VLSI
Vishwakarma Institute Of Technology
Bachelor of Engineering (BEng), Electronics
Matoshree Education Socieyts Matoshree College of Engineering & Research Centre, A/p. Eklahere, Tal. & Dist. Nashik 423401
Master's degree, VLSI and Embedded System
SKILLS
ABOUT SAGAR VETAL
Experienced Engineer with a demonstrated history of working in the semiconductors industry. Skilled in SoC RTL Design and Integration, Soc Verification, Emulation, Universal Verification Methodology (UVM), System Verilog, VHDL, Ethernet-PCS, RISC5, JTAG, APB, AHB, AXI, Strong engineering professional with a Master\'s degree focused in VLSI and Embedded System.
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