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Reginaldo Gabarrao
Verification Manager @HCLTech
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WORK HISTORY
Verification Manager @HCLTech
Campinas, BR
ASIC Functional Verification
EDUCATION
FGV - Fundação Getulio Vargas
Master of Business Administration (M.B.A.), Project Management
FEI
ESAN - Escola Superior de Administração e Negócios, Business Administration and Management, General
FEI
Engineer's Degree, Electrical and Electronics Engineering
SKILLS
ABOUT REGINALDO GABARRAO
Working on ASIC Functional Verification at HCLTech - Engineering & R&D Services.Application Engineering Manager at Cadence, supporting Verification tools: Xcelium, vManager, Indago; Jasper; Palladium, Protium; Verification IP.Worked for NXP as Research & Development Engineering Manager, in the area of Semiconductor Design, leading a team responsible for Functional Verification activities in the area of SoC Design.Previously worked in Freescale in the area of Embedded Memories in semiconductor design (Embedded Flash Memory, Memory Built-In Self-Test RAM BIST). Helped start the Embedded Memories team in Brazil in 2004, working with Functional Verification activities, growing the team and expanding the scope of the work done locally. Became Manager in the team in 2008.Had previous experience with Software Development for embedded designs in telecommunication equipment, using high-level and low-level languages.International experience: Freescale Semiconductor - Austin, TX (USA; 2004), Motorola - Libertyville, IL (USA; INESC - Porto (Portugal; 19••••97)
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