Ravid Cohen

Verification Engineer @英飞凌

IL

Developed and executed comprehensive test plans from scratch to production-ready status, ensuring functional correctness in complex digital systems, including high-speed SoCs and Flash memory- Utilized UVM and constrained-random verification techniques to build scalable testbenches and validate digital designs with a focus on quality and coverage- Designed and implemented 3 verification checkers for both digital and mixed-signal verification, using FSMs, time-based logic, and triggers to detect functional violations and enhance debugging efficiency- Took ownership over the analog modeling efforts—developed accurate models and collaborated cross-functionally with design and verification teams to integrate and validate across block- and system-level- Modeled and verified analog, digital, and mixed-signal IC blocks using RTL and schematic-based simulations for comprehensive verification coverage.Built and maintained automation scripts, reducing manual effort, and eliminate repetitive verification tasks.Worked closely with global teams, including colleagues in Israel and other international sites, to coordinate deliveries, solve issues, and meet aggressive project milestones.Experienced in debugging, simulation, and waveform analysis to root-cause complex bugs and accelerate time-to-tapeout.