Ramya Mirmira Ananthaswamy

Logic Design Intern @Ampere

Designed a configurable weighted round robin arbiter for usage throughout the SoC design • Enabled assertions and modeled checks to ensure expected behavior through formal verification tool Jasper Gold • Analyzed the design behavior to optimize the design further, uncovered design bugs through inspection and assertions and made design updates to adhere to the requirements • Designed a framework to enable easier and faster MBIST insertion flow with parameterized logic which can be scaled for any memory in the design