Ramsin Ziazadeh

Ic Design Lead at Lyte Ai @Lyte

San Jose, CA, US
MOBILE NUMBERS
+14•••••••45

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WORK HISTORY

Sep 2025 — Present

Ic Design Lead at Lyte Ai @Lyte

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Mountain View, CA, US

IC design lead for delivering high quality silicon to Lyte AI systems.

EDUCATION

1995 — 1998

Oregon State University

MS, Electrical Engineering

N/A

Oregon State University

Master of Engineering - MEng, Electrical and Electronics Engineering

1990 — 1994

Oregon State University

BS, Electrical Engineering

SKILLS

SerdesBicmosAmplifiersLow-Power DesignIcAnalogPcb DesignEmbedded SystemsMixed SignalCircuit DesignCmosAnalog Circuit DesignSemiconductorsHardware ArchitectureMixed-Signal Ic DesignPllVcoIntegrated Circuit Design

ABOUT RAMSIN ZIAZADEH

Joined a new startup company at Lyte AI.SMTS IC designer & design engineering manager at Texas Instruments responsible for architecture and design of high-speed SERDES FPD-LINK chipsets for ADAS & infotainment automotive products.Senior hardware design engineer at Apple Inc. responsible for leading transparent multi-touch sub-system hardware iPad-1 and iPad-2 from design to mass production.Principal IC design engineer and a technical team-lead at National Semiconductor holding 15 US patents and 4 pending patents in the areas of high-speed & precision Analog & Mixed-Signal design techniques. Specialties including high-speed SerDes, High-Performance VCO designs in CMOS and BiCMOS, PLLs, DACs, etc.Areas of interst: high-speed power-efficient Bipolar/CMOS designs, low-noise amplifiers, CTLEs, PLLs, VCOs, CDRs, DACs, AGCs, Cable Drivers, power-efficient transmitters, adaptive channel equalizing techniques.Specialties: Analog & Mixed-Signal IC design and touch hardware design.

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