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Rajesh Murugesan
Senior Engineering Manager - Soc Ip Design, Verification & Emulation @Microchip Technology Inc.
Chandler, AZ, US
EMAILS
r••••••••@microchip.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Aug 2023 — Present
Senior Engineering Manager - Soc Ip Design, Verification & Emulation @Microchip Technology Inc.
SKILLS
Assembly LanguageSystemverilogFunctional VerificationApplication-Specific Integrated Circuits (Asic)Very-Large-Scale Integration (Vlsi)Rtl CodingFpgaOpen Verification MethodologySemiconductorsVmmNcsimSocStatic Timing AnalysisVerilogModelsimDebuggingVlsiAsicRtl Design
ABOUT RAJESH MURUGESAN
Hiring and building Data Center Solutions (DCS) Silicon Development team in Chandler…
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