Rahul Bharadwaj
Verification Manager @AIonSi
Hyderabad, TG, IN
EMAILS
MOBILE NUMBERS
+91 *********19
Signup · Get unlimited contacts
WORK HISTORY
Jul 2024 — Present
Verification Manager @AIonSi
View department →
Lund, SE
EDUCATION
2003 — 2004
VEDANT, Semiconductor Complex Limited,Mohali,Chandigarh,Punjab, India
Advanced PG Diploma in VLSI Design, VLSI
1984 — 1996
St.Andrews High School
High School
N/A
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Microelectronics
1999 — 2003
Jawaharlal Nehru Technological University
Engineer’s Degree, Electronics & Communications Engineering
SKILLS
C/C++, Systemverilog, Vmm,UvmSocDebuggingSemiconductorsStatic Timing AnalysisFunctional VerificationPerlEdaAsicRtl DesignAmba AhbSystem on a Chip (Soc)SystemverilogVerilogUniversal Verification Methodology (Uvm)
ABOUT RAHUL BHARADWAJ
Experienced Engineer in IP & Sub-system Verification. Strong hands on experience in…
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.