Puskuri Ganga Sagar

Pd Engineer @NVIDIA

Bengaluru, KA, IN
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Nov 2023 — Present

Pd Engineer @NVIDIA

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Bengaluru, IN

EDUCATION

2009 — 2013

JNTU HYDERABAD

Bachelor of Technology (B.Tech.), Electrical, Electronics and Communications Engineering

2013 — 2015

Manipal Institute of Technology

Master of Technology (M.Tech.), MICRO ELECTRONICS

SKILLS

Integrated Circuit DesignSocShell ScriptingVerilogEcoNcsimLvsCadenceCadence SpectrePerlEdaXilinxSystemverilogLogic DesignFormal VerificationApplication-Specific Integrated Circuits (Asic)Xilinx IseLow-Power DesignCtsCFunctional VerificationRoutingSemiconductorsMicrocontrollersCmosSimulationsComputer ArchitectureRtl CodingSpectreRtl DesignStatic Timing AnalysisDigital ElectronicsCadence Virtuoso Layout EditorPhysical DesignMixed SignalCircuit DesignDrcMicroelectronicsVery-Large-Scale Integration (Vlsi)Electronics

ABOUT PUSKURI GANGA SAGAR

Good understanding of the physical design flowGood knowledge of Digital Design ConceptsExperience in using industry standard EDA tools(cadence, ICC, ICC2, PT shell, Calibre) for the back-end designScripting languages:shell scripting,Tcl scriptingVLSI domain Skills HDLs: Verilog physical design domain skillsFloorplan, placement, CTS, Routing, DRC, Formality and LVSFamiliar with basic concepts of C. EDA Tool: Encounter, ICC, ICC2, Prime Time tool, Red hawk, virtuoso, Simvision, Eldo, Calibre (DRC,LVS & DFM) and Xilinx ISE Domain: physical Design FlowHave good communication skills, interpersonal relations, analytic skills, hardworking and result oriented as an individual and in a team. Willing to learn new skills and ability to learn fast.Technical support to team membersGood at solving puzzle’s

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