Aswin Sagar

Gpu Hw Functional Safety & Cybersecurity Dv (Physical Ai) @NVIDIA

Santa Clara, CA, US
EMAILS
s•••••@nvidia.com
MOBILE NUMBERS
+14•••••••03

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WORK HISTORY

Feb 2019 — Present

Gpu Hw Functional Safety & Cybersecurity Dv (Physical Ai) @NVIDIA

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Santa Clara, CA, US

Pilot in Command to lead cross-functional efforts for FMEA, FMEDA, Hardware Safety Requirements, Hardware Software Interface, traceability verification strategies, systematics and archival quality for multiple GPU IPs used in automotive chips for self-driving vehicles.

EDUCATION

N/A

North Carolina State University

Master of Science, Computer Engineering

N/A

Mahatma Gandhi University

Bachelor of Technology, Electronics and Communication Engineering

ABOUT ASWIN SAGAR

Over 14 years of RTL design & verification experience of processors and ASICs used in NVIDIA GPUs and AI chips.Worked on 10+ generations of GPUs used for computer graphics as well as high performance computing server platforms gaining significant experience in compute pipe architecture of GPUs.Proficient in architecting verification strategy and designing testbench for ASICs. Specific experience in verification of complex CPUs with new Instruction Set Architecture Definition.Extensive experience in software programming using C++, PythonOver 7 years of experience in ISO 26262 Functional Safety and ISO 21434 Cybersecurity processes in ASIC design cycle of Automotive chipsHigh organizational and technical skills with abilities to execute multiple responsibilites and successfully drive the development of complex projects from start to finish along with high interpersonal and communication skills.Ability to quickly shift to a variety of development environments and manage multiple on-going projects.Specialtieso Unit level and system level RTL Functional Verificationo Software Programming (C++ and Python)o Expertise in Functional Safety Processes for Automotive chips (FMEA, FMEDA, DV Traceability of HSRs)o Expertise in conducting safety reviews. o Expertise in Synthesis, area & timing checks, power analysis of RTL designo Outstanding technical problem solving and debugging abilityo Excellent project management skills and ability to juggle multiple projects at onceo Excellent knowledge in Computer Architecture

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