Pooja Ganapathy
Hardware Engineer @Cisco
San Jose, CA, US
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WORK HISTORY
Jan 2013 — Present
Hardware Engineer @Cisco
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San Francisco, CA, US
Worked as a verification Engineer to test modules in the Forwarding Engine.Used System Verilog in a UVM based environment for module level as well as block level verification.Worked on C/C++ reference models used in the self checking test environment.Developed Perl/Python scripts for analyzing Data as well as algorithms.
EDUCATION
2010 — 2012
San Jose State University
MS, Electrical Engineering
2003 — 2007
Savitribai Phule Pune University
BE, Electronics
SKILLS
VerilogC++CSystemverilogJavaUniversal Verification Methodology (Uvm)PerlIntegrated Circuit DesignAsicModelsimChurch ConsultingSoftware DevelopmentAutomationMovie MagicArmMicrocontrollersUnixBartendingSignal ProcessingSoc
ABOUT POOJA GANAPATHY
Senior Verification Engineer, Cisco Systems
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