Nebai Araya
Digital Verification Engineer @Siliconjackets
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WORK HISTORY
Digital Verification Engineer @Siliconjackets
Atlanta, GA, US
Designed and verified a 64-bit SystemVerilog calculator composed of modular 32-bit adders, a result buffer, and an FSM-based controller, all integrated into a top-level chip design file- Simulated RTL design using Cadence tools (SimVision, Verdi) to validate functional correctness through waveform analysis and automated testbenches- Currently working on module-level testbenches for our 3rd tapeout.
EDUCATION
Georgia Institute of Technology
Bachelor of Science - BS, Computer Engineering
ABOUT NEBAI ARAYA
My name is Nebai Araya and I am a second-year student at the Georgia Institute of…
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