Lokesh Bojja
Lead Design Engineer @Cadence
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WORK HISTORY
Lead Design Engineer @Cadence
Hyderabad, IN
EDUCATION
Institution of Engineers of India (IEI), Kolkata
Associate's degree
A.A.N.M. & V.V.R.S.R POLYTECHNIC, GUDLAVALLERU
Diploma
ABOUT LOKESH BOJJA
An Engineer with 6+ years of real time hands on experience in Physical Verification, RDL, IP integration, IO & Bump Planning activities. Worked as Physical Verification Engineer for various projects in 6nm,7nm,12nm,22nm,130nm & 180nm,technologies with TSMC,Towerjazz & Skywater Foundaries. Worked on IO Planning & Bump Planning activities For TSMC 6nm,7nm,12nm & 22nm. Done IP\'s PG/Signal routing & integration activities for DDR, PLL, Serdes, EFUSE, Thermal Diode, Thermal Sensor, Process Monitor,Voltage Monitor, Crystal Oscillator, CAT, etc. in various technologies of TSMC. Familiar with Calibre, Innovus & ICCII tools Good at Unix, Tcl, SVRF & Calibredrv Scripting
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