Laasya Kallepalli
Product Engineering Intern @Qorvo, Inc.
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WORK HISTORY
Product Engineering Intern @Qorvo, Inc.
Greensboro, NC, US
Identified notable parameter errors in Test Plans leading to potential false positives in device testing. Sourced and analyzed device data using JMP to understand device behavior. Utilized Cadence to analyze RF switch design and alter testbench design. Simulated device and testbench schematics to alter parameters for Test Plan. Streamlined Test Plan Analysis Procedure to automate simulations. Automated data parsing in the Test Plan Analysis Procedure using JMP scripts. And understood Production Development life cycle of Wafer creation.
EDUCATION
North Carolina State University
Bachelor of Science - BS, Electrical Engineering and Computer Engineering
Ardrey Kell High School
None, None
ABOUT LAASYA KALLEPALLI
I bridge the gap between high-level RF design and semiconductor characterization by…
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