Karthigaivalli Karuppaiyan
Io and Analog Layout Engineer- Contractor (Mirafra) @Broadcom
Bengaluru, KA, IN
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WORK HISTORY
Nov 2024 — Present
Io and Analog Layout Engineer- Contractor (Mirafra) @Broadcom
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Bangalore, IN
IO layout and IP designs in lower nodes. 16 nm, 7 nm, 5 nm and Samsung 8 nm. Working on a flip-chip GPIOs.
EDUCATION
2011 — 2015
Dhanalakshmi Srinivasan Engineering College, Anna University
B.E, Electronics and communication engineering
ABOUT KARTHIGAIVALLI KARUPPAIYAN
7+ Years of Experience in VLSI backend: Working as an IO and Analog Layout Engineer:…
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