Ehud Nir

Director of Asic Engineering @Cadence

Toronto, ON, CA

Delivering best in class multilevel signaling (PAM4) PCIe PHY. Leading a team of ASIC design, verification, physical implementation and embedded firmware engineers working together on PPA optimized DSP based SERDES, using innovative algorithms and state of the art EDA. Capitalizing on MATLAB HDL Coder, I deployed a semi automatic DSP implementation and verification flow that is low on engineering resources and guarantees good marching between the system model and the netlist.

Tel Aviv University

B.Sc., Electronic Engineer

Tel Aviv University

M.Sc., Electrical and Electronics Engineering