Devarshi Joshi

Power and Performance Product Development Engineer @Altera

San Francisco, CA, US
EMAILS
d••••••••@intel.com
MOBILE NUMBERS
+91 *********19

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WORK HISTORY

Apr 2024 — Present

Power and Performance Product Development Engineer @Altera

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San Jose, CA, US

Power and Performance Characterization | Silicon Bench bringup | Lab Equipment Expertise| Intern mentorship | Collaborative work | Problem-solving | Communication

EDUCATION

2020 — 2022

California State University-Sacramento

Master's degree, Electrical and Electronics Engineering

2014 — 2018

A D Patel Institute of Technology, CVM University

Bachelor of Engineering - BE, Electrical Engineering

ABOUT DEVARSHI JOSHI

Graduated from California State University- Sacramento with my specialization in Computer Architecture and Digital Design. Currently contributing to growth of Altera as a Power and Performance Product Development Engineer validation FPGA silicon.I am looking forward for full time opportunities in Physical Design; Silicon Validation; ASIC/SOC Design and/or Verification roles to innovate technology and broaden my understanding while contributing to the overall growth.My Skills:Hardware Description Languages: Verilog, System Verilog Scripting/Programming Languages: MATLAB, Python, Perl, TCLEDA Tools: Cadence- Virtuoso, Pspice, Synopsys VCSOperating Systems: Windows, Linux, Unix

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