Bala Tarun Nelapatla
Principle Asic Engineer (Dft) @NVIDIA
San Jose, CA, US
EMAILS
b••••••••@nvidia.com
MOBILE NUMBERS
+12•••••••30
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WORK HISTORY
Jan 2025 — Present
Principle Asic Engineer (Dft) @NVIDIA
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Santa Clara, CA, US
EDUCATION
2000 — 2003
Marina International School
IGCSE
2003 — 2005
Narayana Junior College
High School, MPC
2005 — 2009
Birla Institute of Technology and Science, Pilani
B.E Hons, Electrical and Electronics Engineering
2009 — 2011
University of Southern California
Master's degree, Electrical and Electronics Engineering
1995 — 2000
American Christian Academy
Middle School
SKILLS
CTclDft CompilerShell ScriptingVlsiC++MatlabDftApplication-Specific Integrated Circuits (Asic)Vlsi CadJavaAlgorithmsTest EngineeringAsicTetramaxVerilog
ABOUT BALA TARUN NELAPATLA
Hiring for Application Engineers and Product Engineers with Semiconductor DFx Experience. Currently focused on end-to-end DFx methodology, Hardware Analytics, and Automotive Solutions for Semiconductor Designs. Learn more at
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