Arun Prasath G

WORK HISTORY

EDUCATION

ABOUT ARUN PRASATH G

I am a Verification Engineer specialized in system-level verification of complex SoC and protocol-based IPs. 1+ years of industry experience in ASIC/IP Verification using SystemVerilog and UVM Strong experience in UCIe, PCIe, AMBA AXI, APB and AHB protocols, including integration and feature validation Hands-on experience in test plan creation, test case development, execution, and regression testing Worked on system-level integration and verification of multi-protocol designs Have experience in debugging complex issues, root-cause analysis, and corner-case scenario handling Exposure to Physical layer concepts, link initialization, training, low power management, and credit mechanisms Have experience in protocol configuration and speed/link-width testing across multiple scenarios Actively participated in customer discussions to understand requirements and align verification objectives Strong understanding of SoC architecture and verification workflows Quick learner with a strong interest in Validation, IVT, and Post-Silicon domainsTools & Technologies:SystemVerilog, UVM, UCIe, PCIe, AXI, APB, AHB, Cadence Xcelium, Synopsys VCS, Verdi, Linux