Arash Abtahi Forooshani

Principal Engineer @Marvell Technology

Toronto, CA
MOBILE NUMBERS
+91 *********19

Signup · Get unlimited contacts

WORK HISTORY

Dec 2022 — Present

Principal Engineer @Marvell Technology

View department →

Toronto, ON, CA

EDUCATION

2002 — 2007

Isfahan University of Technology

Bachelor of Science, Electronics Engineering

2009 — 2012

Universiti Putra Malaysia

Master of Science, Computer Systems Engineering

SKILLS

Logic SynthesisFunctional VerificationMatlabLiberateCadenceVhdlLintLibrary CharacterizationSiliconsmartVerilogStatic Timing AnalysisFormal VerificationFpgaCadence VirtuosoAsicLibrary ValidationIp ValidationCadence SpectrePerlRtl DesignCadence LiberateSocDigital Ic DesignStandard CellTclCharacterization

ABOUT ARASH ABTAHI FOROOSHANI

Experienced in Digital ASIC design and architecture, DSP algorithms, RTL Design, Logic Synthesis, STA, Formal verification, CDC, RDCHands on Experience in designing digital components for AMS designs, including Non Linear FIR filters, Async FIFO, FFE, DFE, LMSE Feedback Loops used in High speed SerDes, High speed Datapath design for D2D, Sigma Delta Modulator, VCO Tuner, TX Calibration, Gain and Offset Calibration for sarADCPractical knowledge of Link Training for Ethernet protocol, 802.3, Squelch Detection and High Speed Datapath designIn depth knowledge of Fusion Compiler, Conformal LEC, Conformal ECO, Formality, PrimeTimeKeywords: Verilog, Matlab, AMS, Serdes, Ethernet, Calibration, ECO, Synthesis, RTL, Design

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Arash Abtahi Forooshani — Principal Engineer at Marvell Technology in Toronto, CA | Unifers