Abhigyan Chattopadhyay

Asic Formal Verification Engineer @NVIDIA

Gurugram, IN

Worked on pre-silicon formal verification of the GPCARB XLAT—central to the GPU memory system for arbitration across GPCs (Graphics Processing Clusters) in high-speed, low-power designs.Owned and formally verified the complete GPCARB XLAT block across multiple recent GPU projects.Built formal testbenches, Verilog models, properties, and abstractions to catch complex corner-case bugs early in the cycle for verifying command and data flow arbitration.Verified data correctness, ordering, and forward progress of packets from GPU clients including TPCs, SMs, Raster Units, ROPs, and Primitive Engines.Ensured protocol compliance and data integrity to downstream memory units like L2 caches and Frame Buffers.Signed off formal verification for 3 GPUs: GB20x (Blackwell, RTX 50 series) and two unreleased Rubin-generation Consumer and Data Center GPUs, contributing to first-pass silicon success.Worked closely with the GPCARB RTL team, reducing iterations by up to 80% and accelerating signoff.