Zun Huang
- Role
- Senior Design Engineer at ASML
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Zun Huang
6 years industry development experience in sub-10nm semiconductor fabrication fidelity…
Experience
Senior Design Engineer
Nov 2016 — Present
Led in advanced EUV lithography and imaging performance optimization and control product development and feasibility study for 5/3nm process node. • Led an engineering team in the design and development of a computational defect prediction and inspection tool for sub-10nm semiconductor fabrication pattern fidelity metrology using ASML HMI’s state-of-art electron-beam inspection tool. • Developed a prototype of computational lithography imaging and inspection application to predict high volume manufacturing (HVM) semiconductor wafer defects. Researched a “deep-learning” based methodology to improve model accuracy and enhance defect pattern selection optimization for yield improvements.
Skills
- Electronics
- Fortran
- Mathematical Modeling
- Optical Microscopy
- Labview
- Nonlinear Optics
- Spectroscopy
- Mathematica
- Materials Science
- Photonics
- Image Processing
- Electron Beam Lithography
- Microfabrication
- Solid State Physics
- Numerical Simulation
- Photolithography
- Numerical Analysis
- Scientific Computing
- Device Characterization
- Etching
- Semiconductors
- Plasmonics
- C++
- Mpi
- Nanofabrication
- Public Speaking
- Experimentation
- Simulations
- Electrical Engineering
- Scanning Electron Microscopy
- Afm
- C
- Pecvd
- Comsol
- Matlab
- Signal Processing
- Python
- Molecular Dynamics
- Physics
- Sputtering
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