Ziauddin Ahmad

About Ziauddin Ahmad

VLSI Domain SkillsHDLs: Verilog HVL: System VerilogTB Methodology: UVMScripting Language: TCL - TK,PERLEDA Tool: Xilinx ISE, Modelsim, QuestaSim,NCSIM,VCSProtocols: QSPI/OSPI,AMBA-AXI,ATB,AHB2/AHB3,ASB,APB2/APB3,NOC Domain: Functional Verification -Verification IP development-IP\'s verification using SV/UVM/UVM-RAL based verification environment-Experience in writing assertions and functional coverage bins. Knowledge: IP Verification:QSPI NOR Flash Memory Controller using SV Testbench capable of supporting multiple Flashes- Exhaustive Verification Plan development to ensure high reliability IP used across variety of domains including Automotive, Networking etc.Experienced Verification Engineer with knowledge of System Verilog, UVM based ASIC Verification.Extensive experience on Memory Controller verification with working knowledge on:Serial DDR & SDR Communication memory Interfaces (Cadence VIPs)Octal NVMs (OSPI)-Verification IP development -AHB,APB,CPRI,JEDEC204b

Experience

1. Design Engineer

   NXP Semiconductors

   Oct 2019 — Present · IN

Education

• Sir Padampat Singhania

  Intermediate

  2006 — 2008

• Greater Noida Institute of Technology,Greater Noida, U.P.

  Bachelor's degree, Electrical, Electronics and Communications Engineering

  2008 — 2012

• St.paul's School

  High School

  2005 — 2006

Skills

• Tcl-Tk
• Fpga
• Asic
• Rtl Coding
• C
• Programming
• Vhdl
• Simulations
• C++
• Rtl Design
• Very-Large-Scale Integration (Vlsi)
• Verilog
• Functional Verification
• Perl
• Eda
• Soc
• Digital Electronics
• Operating Systems
• Uvm
• Tcl
• Xilinx
• Systemverilog
• Shell Scripting
• Vlsi
• Linux
• Modelsim
• Windows
• Field-Programmable Gate Arrays (Fpga)
• Integrated Circuit Design
• Xilinx Ise