Zhaowen Wang
Smts Silicon Design Engineer @AMD
San Jose, CA, US
EMAILS
z••••••••@amd.com
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Jun 2024 — Present
Smts Silicon Design Engineer @AMD
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San Jose, CA, US
EDUCATION
2017 — 2019
Columbia University
Master of Science (MS), Electrical and Electronics Engineering
2013 — 2017
Zhejiang University
Bachelor of Engineering (B.Eng.), Electronics and Information Engineering
2017 — 2021
Columbia University
Doctor of Philosophy - PhD, Electrical and Electronics Engineering
ABOUT ZHAOWEN WANG
Chip design experience with 65nm, 28nm, 22nm SOI, and 7nm- Analog and mixed-mode…
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