Zhang Jiejing

Principal Engineer @Together AI

San Francisco, CA, US

Led end-to-end LLM inference acceleration for production models and key customers, covering profiling → bottleneck isolation → optimization design → implementation → validation.Drove performance improvements across core kernels and serving stack: GEMM, Attention/FlashAttention-style optimizations, MoE operators, CUDA graph/launch overhead, and memory-bandwidth bottlenecks.Designed and implemented cache-aware disaggregated inference (Prefill/Decode separation), enabling scalable throughput under high concurrency and long-context workloads.Built/optimized distributed KV-Cache architecture and cache management strategies (cache locality, paging/eviction, network + GPU memory tradeoffs) to reduce tail latency and improve cluster efficiency.Established performance methodology and tooling (GPU profiling, roofline-style analysis, kernel-level metrics, end-to-end QPS/TTFT/TPOT) and delivered actionable optimization plans for multiple model families.

University of Electronic Science and Technology of China

Bachelor, Software, Computer Science and technology