Zayyan Siddiqui
SoC Design Engineer at Intel India.
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Zayyan Siddiqui
12+ years of experience in Memory Layout Design (DRAM/SRAM/RF/ROM) with single/dual port memory.# Working experience on Finfet & Planner both.# Technology nodes- 7nm,10nm, 14nm, 22nm, 28nm, 32nm.# Worked for different foundries like INTEL, TSMC, GF, SAMSUNG.# Good exposure to Electromigration & IR drop.
Experience
Soc Design Engineer
Jul 2022 — Present · Bengaluru, IN
Education
Jamia Millia Islamia
Bachelor of Engineering (B.E.), Electronics
2008
Skills
- Soc
- Lvs
- Asic
- Cmos
- Tcl
- Debugging
- Design Rule Checking (Drc)
- Drc
- Cadence Virtuoso
- Vlsi
- Integrated Circuit Design
- Perl
- Eda
- Linux
- Semiconductors
- C
- Physical Design
- Electronics
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