Zaid Umar Aejaz
Senior Engineer – Hardware Design at Tejas Networks Ltd | High-Speed Digital | DDR | SERDES | Board Bring-Up | Embedded Systems
- Role
- Senior Engineer at Tejas Networks
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Zaid Umar Aejaz
About - I don’t just design circuits — I build the backbone of next-gen wireless systems.As a Senior Hardware Design Engineer, I thrive on transforming complex digital architectures into high-performance, production-ready hardware. My passion lies in creating designs that are not only robust but also scalable and future-proof.What Drives Me - I’m driven by the challenge of designing high-speed, high-reliability systems that power tomorrow’s connectivity — from 5G to SDR and beyond. My goal? Seamless integration, clean design, and flawless execution.Key Highlights - Led schematic, layout, and bring-up of multiple 5G Radio Units — delivering POC with DDR + JESD204C routing and EMI/EMC compliance.Validated and debugged radio units through high-speed clock synchronization analysis and power noise optimization using advanced test and measurement tools.Core Strengths - Schematic Capture | OrCAD | Allegro | DxDesigner | DDR | SERDES | QSPI | SPI | I2C | UART | Board Bring-Up | EMI/EMC | SoC | FPGA | Microcontroller | System Integration | LeadershipLooking Ahead - I bring focus, precision, and collaboration to every design — whether it’s wireless, embedded, or high-speed digital systems. If you\'re building the future of hardware, let’s connect and create something exceptional.
Experience
Senior Engineer
Apr 2024 — Present
Hardware Design & Bring-Up
Education
HKBK Group of Institutions
Bachelor of Engineering - BE, Electrical and Electronics Engineering
2016 — 2020
Birla Institute of Technology and Science, Pilani
Master of Technology - MTech, Embedded Systems
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