Zahid Mushtaq

Experience

1. Principal Engineer (Director)

   Intel

   Jan 2024 — Present · Austin, TX, US

   Server and SOC Clock Architect for Hugh speed CPU, Fabrics, High Speed IOs, Platform and Timing Closure.

Education

• University of Engineering and Technology, Lahore

  BSc (Honours) Electrical Engineering, Electrical, Electronics and Communications Engineering

  1994 — 1999

• University of Southern California

  MS, VLSI Design

  2001 — 2002

Skills

• Computer Architecture
• Vlsi
• Serdes
• Logic Synthesis
• Functional Verification
• Analog Circuit Design
• Semiconductors
• Integrated Circuit Design
• Microprocessors
• Dft
• Tcl
• Analog
• System on a Chip (Soc)
• Fpga
• Asic
• Pll
• Low-Power Design
• Application-Specific Integrated Circuits (Asic)
• Systemverilog
• Hardware Architecture
• Static Timing Analysis
• Pcie
• Mixed Signal
• Circuit Design
• Soc
• Ic
• Processors
• Cmos
• Rtl Design
• Simulations
• Phase-Locked Loop (Pll)
• Sram
• Cadence Virtuoso
• Verilog
• Logic Design
• Physical Design
• Timing Closure
• Debugging
• Eda