Yura Kocharyan

Analog Design Engineer @Intel

Working on MIPI PHY TX designs. Completed multiple designs in different technology nodes • Working on MIPI PHY RX building blocks design. • Working on high performance MIPI PHY TX block capable of operating in both PAM4 and NRZ signaling modes. • Created specification and designed architecture for driver and termination resistance calibration block, RX bias circuitry, bias current calibration block and RX termination block for Gen4 PCIX PHY IO. • Improved performance of TX clock duty cycle correction and receiver detection circuitry. • Performed circuit design for performance critical blocks for calibration blocks. • Assisting junior level team members and reviewing layout design activities.