Yunxi Wu
Senior Design Verification Engineer at NVIDIA
- Role
- Senior Design Verification Engineer at NVIDIA
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
About Yunxi Wu
Experienced Verification Engineer with a demonstrated history of working in the semiconductors industry. Familiar with Computer Architecture and pre-Si verification. Skilled in Verilog/SystemVerilog/Specman E/UVM; Synopsys Verdi and developing verification test benches and constrained random validation. Strong knowledge of ASIC/FPGA Design Flow.
Experience
Senior Design Verification Engineer
Sep 2021 — Present · Santa Clara, CA, US
GPU - ssv memory subsystem CPU - nvfrabic
Education
Arizona State University
Master of Science Engineering, Electrical Engineering, Electronic and mixed-signal circuit design
2012 — 2014
Shenzhen University
Bachelor of Science (BS), Electrical and Electronics Engineering
2007 — 2011
Skills
- Xilinx Ise
- Vlsi
- Processors
- Fpga
- Soc
- Asic
- Perl
- Embedded Systems
- Verilog
- Cadence Virtuoso
- Spice
- Matlab
- Dc
- Icc
- Physical Design
- Vhdl
- C++
- Tcl
- Static Timing Analysis
- Cadence Virtuoso Layout Editor
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