Yuanda Gao
Senior Technology Development Process Engineer at Intel Mask Operation
- Role
- Senior Technology Development Process Engineer at Intel
- Location
- San Francisco, CA, US
- LinkedIn followers
- 500 followers
Information TechnologyView LinkedIn profile
Experience
Senior Technology Development Process Engineer
Apr 2016 — Present · Santa Clara, US
Education
Columbia University
MS/PhD, Mechanical Engineering
2009 — 2015
Northeastern University (CN)
BEng, Mechanical Engineering
2005 — 2009
Skills
- Afm
- C
- Nanoelectronics
- Icp
- Microsoft Office
- Pvd
- R
- 2d Material
- Optoelectronics
- Rie
- Sem
- Nanofabrication
- Ald
- Matlab
- Cvd
- Thin Film
- Spectroscopy
- Semiconductors
- Graphene
- Photonics
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