Yong Hyeon Yi
Circuit Design Engineer, Memory Design and Pathfinding
- Role
- Circuit Design Engineer at Intel
- Location
- Portland, OR, US
- LinkedIn followers
- 500 followers
About Yong Hyeon Yi
Memory design and pathfinding circuit design engineer and former reliability-aware…
Experience
Circuit Design Engineer
Mar 2024 — Present · Hillsboro, OR, US
Designed and verified SRAM yield test chip circuits for Intel’s advanced process technology characterization, contributing to 18A and 14A node development (GAA RibbonFET and back-side power delivery). Experienced in enhancing SRAM periphery circuit performance and debugging design issues.Developed and validated SRAM read/write circuits, including negative bitline write-assist and yield testing features, at both schematic and layout levels. Proficient in test chip functional verification, array-level margin characterization, Fmax simulations, and timing analysis.
Education
University of Minnesota
Doctor of Philosophy - PhD
2020 — 2024
University of Minnesota
Master of Science - MS
2020 — 2023
Sogang University
Bachelor's degree
2013 — 2019
Seoul National University
Doctor of Philosophy - PhD
2019 — 2020
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