Yogesh Prasad

About Yogesh Prasad

I am an Analog Layout Engineer with a passion for pushing the boundaries of semiconductor technology. My career journey has led me to work with cutting-edge technologies, including 3nm, 7nm, and 28nm tech nodes.Key Skills:1. Proficient in Cadence Layout XL and EXL editors.2. Experienced in debugging LVS, DRC, and ERC.3. Skilled in floorplanning, placement, and routing.4. Matching and Shielding.5. Familiar with EM and IR effects, as well as antenna and latch-up effects.6. Strong circuit design capabilities.7. Basics of UNIX.8. Problem-solving and communication skills.Worked on tech Nodes- 1.TSMC(3nm) 2.INTEL(5nm)3.INTEL(7nm)Hands on Physical Verification tool-1. Calibre2. ICV VUEHands on layout tools-1. Cadence Virtuoso2. Synopsys Custom CompilerAcademic Achievements:1. Presented a paper on \"Design of a Constant Bandwidth Variable Gain Amplifier for 5G receivers\" at the \"International Conference on Advances in Communications, Computing and Embedded Systems (ACCES)-2020.\"2. Accepted for publication in \"International Journal of Systems, Control and Communications (IJSCC)\" by Inderscience Publishers.I am passionate about pushing the boundaries of analog design and semiconductor technology. My goal is to leverage my skills and experience to contribute to innovative projects and drive the growth of the semiconductor industry. Let\'s connect and explore opportunities for collaboration and advancement.

Experience

1. Design Engineer Ii

   Cadence

   Jul 2024 — Present · Hyderabad, IN

Education

• Gyan Ganga institute of technology and sciences

  Bachelor of Engineering (BE), Electrical and Electronics Engineering

  2011 — 2015

• SRM IST Chennai

  Master of Technology - MTech, VLSI DESIGN

  2018 — 2020

Skills

• Teamwork
• Mainframe
• C++
• Jcl
• Powerpoint
• Microsoft Excel
• Microsoft Office
• Sql Db2
• Informatica
• C
• Cics
• Cobol
• Unix
• Microsoft Word