Yiwu Tang
Senior Director of Technology @高通
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WORK HISTORY
Senior Director of Technology @高通
San Diego County, CA, US
Track of record of IC development from chip definition, concept review, design and verification to tape-out, characterization and production of multiple high volume communication SOC.* PLL IP technology lead* Analog, mixed-signal and RF IC design expertise in phase locked loop (PLL) based frequency synthesizers and clock generation * Technical leadership in leading large IC design team and collaborating with cross functional teams in modem and RF systems, software, layout, product and test engineering.* Research interest in wireless and wireline communication IC, PLLs, and ultra-low power data link.* Ambient IOT IC design* Other responsibilities:* Patent review committee * Staffing and recruiting * University relationships, Qualcomm Innovation Fellowship review and mentor
EDUCATION
University of Maryland
Master of Science (M.S.)
Tsinghua University
Bachelor of Science (BS) and Master of Science (MS), Electrical Engineering
The Ohio State University
PhD, Electrical Engineering, Mixed Signal IC and PLL Design
SKILLS
ABOUT YIWU TANG
Phase locked loop (PLL) designAnalog and RFIC design
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