Yingli Fan
- Role
- Gate all Around Transistor Technology Development Yield & Integration Lead Engineer (Metal Gate) at Intel
- Location
- Vancouver, WA, US
- LinkedIn followers
- 500 followers
Experience
Gate all Around Transistor Technology Development Yield & Integration Lead Engineer (Metal Gate)
Apr 2022 — Present · Hillsboro, OR, US
Achievements: Significant yield improvement on GAA Transistor development and balancing yield and performance-Identified top yield issues on intel 18A Metal Gate to meet product development goal based on end of line(EOL) functional test, inline electrical test and Failure analysis(FA)-Analyzed experiment split lot to help identify process knob for yield improvement based on EOL function test signal,inline electrical test-Monitor the baseline lots Yield trend to timely identify source of variation -Generated Metal gate related issue pareto to guide module and integration to work on different issues with right priority- To evaluate yield healthiness when performance elements are put on and make recommendation by balancing performance and yield- Coaching and mentoring junior engineers in daily yield analysis activities
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.