Yatish Vahvale

Design Verification Engineer @Samsung Semiconductor

Bengaluru, KA, IN
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WORK HISTORY

Nov 2024 — Present

Design Verification Engineer @Samsung Semiconductor

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Bengaluru, IN

EDUCATION

2019 — 2021

R. V. College of Engineering, Bangalore

Master of Technology - MTech

2015 — 2019

Rajiv Gandhi Institute of Technology, BANGALORE

Bachelor of Engineering - BE

ABOUT YATISH VAHVALE

Connect for VLSI guidance on topmate.io https://topmate.io/yatish_vahvale

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Yatish Vahvale — Design Verification Engineer at Samsung Semiconductor in Bengaluru, KA, IN | Unifers