Yatharth Jain
IP Design Verification Engineer @Intel | MTech @NIT-KKR\'25 in VLSI Design | Passionate about Semiconductor Physics and VLSI Design | EC Engineer | Deep Learning Enthusiast
- Role
- Ip Design Verification Engineer at Intel
- Location
- Saharanpur, UP, IN
- LinkedIn followers
- 500 followers
About Yatharth Jain
Skills: SV, UVM, Python, SV coverage & assertions, Verilog HDL. Subject of Interest:…
Experience
Ip Design Verification Engineer
Jul 2025 — Present · Bengaluru, IN
Education
JSS ACADEMY OF TECHNICAL EDUCATION, NOIDA
Bachelor of Technology - BTech, Electronics and Communication Engineering
2018 — 2022
National Institute of Technology, Kurukshetra, Haryana
Master of Technology - MTech, VLSI Design
2023 — 2025
St. Mary's School - Saharanpur
Higher secondary school
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