Yaswanth Nikhil B
Physical Design Engineer at Capgemini
- Role
- Physical Design Engineer at Capgemini Engineering
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
About Yaswanth Nikhil B
Work experience as a Physical Design Engineer with an experience of 6+ years • Worked in AMD-ODC environment,familiar with Tilebuilder flow. • Worked on TSMC-6nm,TSMC-7nm & GF 22nm FDSOI technologies.• Deep understanding on STA and low power designs, resolved timing issues using industry standard tools like Prime Time and Tempus.• Superior skills in debugging timing issues and writing ECOs.• Good knowledge of Digital Design Concepts. • Experience in Physical Design using Synopsys IC compiler II and Cadence Innovus. • Basic knowledge on Physical Design Verification methodology to debug LVS/DRC/IR issues at tile level.
Experience
Physical Design Engineer
Feb 2022 — Present · Hyderabad, IN
Education
Annamacharya Institute of Technology & Sciences,(Autonomous) New Bowenpally, Rajampet
Bachelor of Technology - BTech
2014 — 2018
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